Personal Information
Associate researcher Supervisor of Master's Candidates
Paper Publications
- Analog-to-Digital Converter Design for Diverse Performance Computing-in-Memory Systems: A Comprehensive Review:IEEE Integrated Circuits and Systems,2025
- Enhancing LLM Inference Performance on ARM CPUs through Software and Hardware Co-optimization Strategies:IEEE Integrated Circuits and Systems,2025
- A Parallel Computing-in-Memory Accelerator Utilizing FeRAM Array with Retention Loss Correction:SCIENCE CHINA Information Sciences,2025
- Impact of Scaling Thickness on the Ferroelectric Properties of Pt/al0.8sc0.2n/pt Capacitors.[J]:IEEE Transactions on Electron Devices,2024
- Ferroelectric Reconfigurable Fet Memory on Fully Depleted Silicon-on-insulator Platform:IEEE Electron Device Letters,2025,46(2):163-166
- 毛伟,A 28-nm 135.19 Tops/w Bootstrapped-sram Compute-in-memory Accelerator With Layer-wise Precision And Sparsity.[J]:IEEE Transactions on Circuits And Systems I-regular Papers,2024
- A Low-Power Charge-Domain Bit-Scalable Readout System for Fully-Parallel Computing-in-Memory Accelerators:IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II),2024
- A Low-Power DNN Accelerator with Mean Error Minimized Approximate Signed Multiplier:IEEE Open Journal of Circuits and Systems (OJCAS),2024
- A Reconfigurable Processing Element for Multiple-Precision Floating/Fixed-Point HPC:IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II),2024
- APCCAS 2022 Guest Editorial Special Issue Based on the 18th Asia Pacific Conference on Circuits and Systems:IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I),2023
- A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier:IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II),2023
- An Energy-Efficient Mixed-Bit CNN Accelerator with Column Parallel Readout for ReRAM-based In-memory Computing:IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS),2022
- An Energy-Efficient Mixed-Bitwidth Systolic Accelerator for NAS-Optimized Deep Neural Networks:IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI),2022
- A Fall Detection Network by 2D/3D Spatio-Temporal Joint Models with Tensor Compression on the Edge:ACM Transactions on Embedded Computing Systems (TECS),2022
- A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing:IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II),2022
- A High Performance Multi-bit-width Booth Vector Systolic Accelerator for NAS Optimized Deep Learning Neural Networks:IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I),2022
- A Fully Integrated Power Converter for Thermoelectric Energy Harvesting with 81% Peak Efficiency and 6.4-mV Minimum Input Voltage:IEEE Transactions on Power Electronics (TPE),2022
- A 703.4 GOPs/W Binary SegNet Processor with Computing-Near-Memory Architecture for Road Detection:IEEE Design & Test,2022
- ANT-UNet: Accurate and Noise-Tolerant Segmentation for Pathology Image Processing:ACM Journal on Emerging Technologies in Computing Systems (JETC),2022
- A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing:IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI),2022
- A 74-μW 11-Mbps Wireless Vital Signs Monitoring SoC for 3-Lead ECG, Respiration Rate, and Body Temperature:IEEE Transactions on Biomedical Circuits and Systems (TBioCAS),2019
- A Low Power 12-bit 1-kS/s SAR ADC for Biomedical Signal Processing:IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I),2019
- High Dynamic Performance Current-Steering DAC Design with Nested-Segment Structure:IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI),2018
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