A High Performance Multi-bit-width Booth Vector Systolic Accelerator for NAS Optimized Deep Learning Neural Networks
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Title of Paper:A High Performance Multi-bit-width Booth Vector Systolic Accelerator for NAS Optimized Deep Learning Neural Networks
Journal:IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)
Translation or Not:No
Date of Publication:2022-09-11
Date:2024-07-11