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Institution:Xi'an Shiyou University, Xiduan University

Title of Paper:An Approach to Modeling and Verifying Multi-level Interrupt Systems with TMSVL

Teaching and Research Group:Institute of Computing Theory and Technology

Journal:SOFL+MSVL 2019 Workshop

Project Source:NSFC Grant Nos. 61806158, 413619001

Key Words:Multi-level interrupt systems · Timed Projection Temporal Logic · TMSVL · Formal verification ...

All the Authors:Buwen Liang

First Author:Jin Cui

Correspondence Author:Luxury

Document Code:7

Discipline:Engineering

First-Level Discipline:Computer Science and Technology

Document Type:C

Page Number:61–72

Translation or Not:No

Date of Publication:2019-11-05

Included Journals:EI

Date:2020-12-16